Basic Information

  • Curriculam: BTech
  • Name: Saumya Shah
  • Current Year of Study : 4th
  • Year of Internship: 3
  • **Role during Internship **: Hardware Engineering Intern
  • Duration: 10 weeks
  • What kind of roles/companies were you primarily aiming for?: Roles in VLSI pertaining to digital design; FPGA intern

    Motivations

    I got interested in digital design through EE224, the thought of being able to make your own processor fascinated me. Taking advanced electives strengthened my interest in that domain.

Resources

Lecture slides of EE103 (DIC), EE224 notes and EE214 lab material. Learnt Verilog & STA from the internet. https://nandland.com/learn-verilog/ https://www.asic-world.com/verilog/veritut.html Sedra Smith for an analog refresher

Main Topics

Brush up on DIC topics: Flip-flops, counters, and latches. Logic gates using CMOS. Boolean algebra, FSMs and basic computer architecture (224 is sufficient). Learn VHDL/Verilog well, as a coding question is asked in the interview. STA and ASIC/SoC design are useful topics too. Be thorough with all the projects mentioned in your resume.

Selection process

Online Hardware Challenge (Mid July) –> Interviews (2 technical rounds on Day 1) –> Offer

Road-blocks

The interview questions can be difficult sometimes, which may throw you off your game. But having a strong foundation helps, as they test how you approach an unknown problem more than whether you can get to the correct answer.

Work during internship

I worked with the Physical Design CAD team on the next-gen Pixel chips. My main role was to evaluate a new AI-based CAD tool by Synopsys and test its performance on internal benchmarks.

Overall Internship Experience

The working hours are very flexible, with only 3 mandatory work-from-office days per week. Emphasis is more on getting results while also maintaining a good work-life balance. My team was a small one with just 13 full-time employees, with me being the only summer intern there. My team worked from home every Monday and Friday, which limited offline interactions. I was assigned a host and a co-host, both of whom were from the same team. I mainly corresponded with my co-host, who helped me get up to speed with my project. Google has a lot of perks, fine-dine food every day, free cabs to and from the office, Xbox and arcade games for recreation and even a mini-golf course inside the office! There’s always something fun to do.

Networking opportunities

Google has a buddy mentorship program that is open to everyone. I was assigned a mentor who worked on Data Science for Google Earth and GMaps. He gave a broader perspective of the available opportunities at Google and also organized networking sessions with senior members who worked on VLSI design at Google.

Reccomended or not

The internship experience at Google very much depends on the team you are assigned to (for which you have no say). Personally speaking, 10 weeks is far too little for meaningful work to be done in PD CAD, as the execution time for most programs is well over a week. Though I did manage to get some results in, the duration felt too short to gain any significant experience. That being said, the learning curve initially was very steep as I ventured into a domain I had no idea of before. I learned many new and interesting concepts that are at the forefront of the VLSI CAD process today, and just for that insight, I would say this internship is worth pursuing.

Advice

The entire chip design industry works with Verilog/SystemVerilog, No one uses VHDL except for highly specialized applications in defence and aerospace. For all other applications, Verilog is the one most used for RTL design.