EE 620 – PHYSICS OF TRANSISTORS
Note: This is a compulsory course for third year micro students.
Professor when I took the course:
Prof. Udayan Ganguly in the spring semester of year 2014-2015
Prerequisites: Nothing compulsory. Basic Solid State Device Course (EE207/EE733)
Course Content: A selection of topics from the following:
- Electrostatics: geometry, dielectrics, free and depletion screening ; Application: FinFET Design
- Band Diagrams in equilibrium: Ge / SiGe source drain and channel; Also added Nanocrystal Flash Memory Design;
- Classical Transport: Electrons in a band, Quasi-Fermi level, MOSFETs etc. Planar transistor and DRAM transistor design considerations
- Quantum Transport: Tunneling in dielectrics and Si Floating Gate Flash Memory Design
Evaluation Structure:
| Topic | Quantity | Weight |
|---|---|---|
| Home-works | 8 | 15% |
| Quiz | 4 Quizzes (including midsem and endsem) | 4×15%=60% |
| Project | 1 project, Week of April | 20% |
| Class participation/ Attendance | Class Work; Recitations; | 5% |
Feedback on lectures:
Attendance was not compulsory, but the instructor insisted on compulsory attendance.
The instructor had an interesting methodology to teach the course, he would give some short problems in class, which were related to topic being taught, and built up upon the next topic. A relatively smaller class size ensured that the instructor involved everyone in the activity.
The lectures were pretty good till the electrostatics part, but it kind of drifted away as the course moved to band diagrams and QM part, hence it is essential to attend them seriously. All the lecture slides were uploaded on moodle but the slides were not very organized and not easy to comprehend on the night before exams, hence attending classes is must to score well in exams.
Feedback on assignments and exams:
We had a total of eight assignments, with some of the assignments having as many as three sub parts. Hence the assignments will keep you busy for most of the time. Assignments were supposed to be done in groups of two, and involved using Matlab and PDE Tool Box. The assignment questions were a bit repetitive and involved a lot of monotonous analytical calculations. Finally only 7 assignments were graded and best 5 out of 7 were taken into account for final grading.
All the exams (including midsems and endsems) had equal weightage of 15%. The exams were very conceptual and required deep understanding of the subject. The questions were based on the assignments, given hence doing all the assignments on your own was a must before exams.
We had a course project in the end of the course which accounted for 20% of the total weightage. Each group was assigned a topic related to current device challenges, and was required to present their topic
Difficulty level: Moderate.
Study Material and References:
Fundamentals of Modern VLSI Devices, Taur and Ning
Grading Stats: AA 10** AB 8 BB 11 BC 8 CC 4 CD 6 DD 5 FR 4
Reviewed by Shashank Gangrade (shashankgangrade@gmail.com)