Basic Information

  • Course Code: EE 671
  • Course Name: VLSI Design
  • Course Offered In: 2023-‘24
  • Semester Season: Autumn
  • Instructors: Prof. Dinesh Sharma
  • Prerequisites: There aren’t any mandatory prerequisites for this course, as the instructor will cover everything from the basics. However, having some familiarity with the MOS devices, digital circuits, Verilog/VHDL and ngSpice will be beneficial.
  • Difficulty (1 being easy and 5 being tough): 4

Course Content

-> Basics of Semiconductor Devices -> Design of logic gates:- CMOS, Pseudo nMOS, CPL, CVSL, Static and dynamic performance, Parasitic devices in CMOS -> Storage Circuits:- latches and flip-flops, synchronous design style. -> Design of Multi-stage Logic:- Tapered inverter design, Logical effort, optimization of geometry for multi-stage logic. -> Semi-custom Design:- Programmable Logic Arrays, Sea of Gates design, FPGAs. -> Arithmetic Circuits:- Adders, Barrel Shifters, Multipliers(Wallace, Dadda, Serial), Multiply and Accumulate circuits. -> Control Path Design:- Finite State Machines for control signals. -> Memories:- Types of memories, ROM, PROM, EPROM, EEPROM, static and dynamic RAM. -> I-O circuits, Testing, Packaging

Feedback on Lectures

Prof. DK Sharma primarily used slides for most of the classes. These lecture slides were exceptionally well-prepared and detailed, making them a valuable resource for students. In addition to the slides, there was a comprehensive PDF provided, which covered the entire course content in detail. The instructor’s way of explaining the concepts was excellent, making it easy to follow along during the lectures. Attending lectures proved to be extremely beneficial. There was an additional benefit for regular attendance: if you were just below the cutoff grade, regular attendance could help you cross the threshold and achieve a higher grade.

Feedback on Evaluations

Assignments (5 Assignments - 15%): Regular assignments that may vary in number and weightage slightly. Quizzes - 2 x 10% = 20% Mid-semester Examination - 25% End-semester Examination - 40 %

The evaluation was both rigorous and supportive, designed to enhance our understanding of VLSI concepts through practical application and theoretical knowledge. Assignments:- The assignments were very helpful in reinforcing the concepts taught in class. Each assignment was followed by a viva with the TAs. Exams:- Both the mid-semester and end-semester exams were well-structured with numerical and theoretical questions to test our grasp of the course content. Each question in the exams was a learning experience in itself, allowing us to apply the concepts learned in class and draw meaningful conclusions.

Study Material and Resources

The material in the following text books were suggested for additional understanding:

  1. N. Weste and K. Eshranghian, “Principles of CMOS VLSI Design”, Addison Wesley, 1985
  2. Jan M. Rabaey, A. Chandrakasan, B. Nikolic, “Digital Integrated Circuits: A Design Perspective”, Prentice Hall/Pearson Education 2003
  3. N. Weste, D.M. Harris, “CMOS VLSI Design: A Circuits and Systems Perspective”, Addison Wesley, 2011
  4. L.Glaser and D. Dobberpuhl, “The Design and Analysis of VLSI Circuits”, Addison Wesley 1985

However, the slides, notes, and materials provided by the prof. on Moodle were more than sufficient for understanding the course content effectively.

Follow-up Courses

EE 705 - VLSI Design Lab EE 669 - VLSI Technology

Final Takeaway

VLSI Design is your ultimate kickoff into the world of Very Large Scale Integration (VLSI). Starting from building simple digital blocks in CMOS technology to tackling complex circuits like multipliers, this course covers it all. The course materials, including excellent slides, detailed lecture notes, and supplementary resources on Moodle, simplify the learning process. Whether you’re thinking of mastering VLSI or gearing up for a career in this area, EE 671 sets you on the path to success.