Basic Information
- Course Code: EE709
- Course Name: Testing and Verification for VLSI Circuits
- Course Offered In: 2022-‘23
- Semester Season: Spring
- Instructors: Prof Madhav Desai, Prof Janak Patel
- Prerequisites: VLSI design is a soft prereq, but would not be necessary
- Difficulty (1 being easy and 5 being tough): 2
Course Content
The course started with Boolean Algebras and Boolean logic, building up to formulae, functions and gates. Then we covered faults and models like Stuck-At faults and testing methodologies. The second half consisted of RoBDDs, Sequential design testing, memory testing, Built-in Self Testing and other verification methods for different designs.
Feedback on Lectures
The course was taught by Prof. Madhav Desai and Prof Janak Patel, UIUC. The lectures by Prof Desai were quite clear and lucid. Concepts taught were not too difficult to comprehend. Lectures by Prof Patel were also very insightful and informative, since some of the lectures comprised of his own work in the field. Some more clarity and less ambiguity at places in the slides would have helped, however.
Feedback on Evaluations
Evaluation consisted of 1 quiz, 5 Assignments, one midsem, one endsem. The quiz was for 10%, the assignments for 20%, midsem for 20% and endsem for 50%. Difficulty was not exceptional.
Final Takeaway
This is a course that can help you get insights into the testing and verification part of the digital design domain. If you wish to pursue this field in a corporate setting then you need to know about testing terminology and methods. EE709 can act as a good introduction to the same. For people looking for a “chill” course, this one fits the bill only if you are regular with classes and assignments as evaluations were not exceptionally tough.